MBus was first used in Sun's first multiprocessorSPARC-based system, the SPARCserver 600MP series (launched in 1991), and later found use in the SPARCstation 10 and SPARCstation 20 workstations. The bus permits the integration of several microprocessors on a single motherboard, in a multiprocessing configuration with up to eight CPUs packaged in detachable MBus modules. In practice, the number of processors per MBus is limited to four. Single processor systems were also sold that use the MBus protocol internally, but with the CPUs permanently attached to the motherboard to lower manufacturing costs.
MBus specifies a 64-bitdatapath, which uses 36-bitphysical addressing, giving an address space of 64 GB. The transfer rate is 80 MB/s sustained (320 MB/s peak) at 40 MHz, or 100 MB/s (400 MB/s peak) at 50 MHz. Bus controlling is done by an arbiter. Interrupt, reset, and timeout logic are also specified.
Related buses
Several related buses were also developed:
XBus
XBus is a packet-switched bus used in the SPARCserver 1000, SPARCcenter 2000 and Cray CS6400. This corresponds to the circuit-switched MBus, with identical electrical characteristics and physical form factor but an incompatible signalling protocol.
KBus
KBus is a high-speed interconnection system for linking multiple MBuses, used in Solbourne Computer Series 6 and Series 7 computer systems.
History
The MBus standard was cooperatively developed by Sun and Ross Technology and released in 1991.[1]